1. Field of the Invention
The invention relates in general to the fabrication of semiconductor integrated circuits (ICs), and more particularly to a method of forming local interconnection of a static random access memory.
2. Description of the Related Art
Due to the requirement of size shrinking of metal oxide semiconductors (MOS) and high integrity, several problems related to local interconnection formation occur. Fabricating contact windows of smaller size increases photo budget and also increases contact resistance, as a result, the performance of the ICs gets worse. Static Random Access Memory (SRAM) is a widely used device which uses a polysilicon layer for interconnecting the polysilicon gate and the source/drain region.
Typically, metal or polysilicon is used to connect the N+ node and the P+ node of an SRAM. In FIG. 1, polysilicon is taken as an example to be used as the material for interconnection between a N+ node 13 and a P+ node 14. An NMOS is formed in P-well 10 and a PMOS is formed in N-well 11. Self-aligned contacts 12 (SAC) are formed around the N+ node 13 and the P+ node 14 and the poly gate 15 is formed to connect and above the NMOS and the PMOS. However, as polysilicon is used for interconnection, it should be doped with N+ dopant or P+ dopant and therefore source/drain region can be formed consequently. As shown in FIG. 1, polysilicon 16 on N+ region must be N+ doped, polysilicon 17 on P+ region must be P+ doped before the back-end process of source/drain region formation, which increases the frequency of performing photolithography and rises the cost. As metal is used for interconnection, the isolation of metal and gate becomes an issue.